The present invention is directed to electronic ballasts, and more particularly to an inverter circuit topology which has improved operational efficiencies over existing electronic ballasts.
FIG. 1 illustrates a conventional parallel load, series resonant electronic ballast 10. Electronic ballast 10 is supplied by an a.c. input source 12. An input signal from input source 12 is rectified by full-bridge rectifier circuit 14 consisting of diodes 16-22. The signal generated by full bridge rectifier circuit 14 is supplied, through an input filter 24, to switching network 26, consisting of switches 28 and 30. Switches 28 and 30 are connected together at one end via node 37 , and may be controlled by a known controller 32, such as a complementary switching system or other known design. Output from switching network 26 is supplied through inductor 34 to a lamp starting circuit 36. Lamp starting circuit 36 includes d.c. blocking capacitor arrangement 38 with capacitors 40 and 42, resonant capacitors 44 and 46and a positive temperature co-efficient element 48 such as a thermister. D.C. blocking capacitors 40, 42 are connected to each other at node 43. Lamp 50 is connected to ballast 10 via cathodes 52 and 54. Capacitor 55 is used as an energy storage capacitor. D.C. blocking capacitor arrangement 38 and capacitor 55 are connected at a first end to circuit bus 56 and at a second end to reference bus 57. Upon initiation of operation a signal from switching network 26 causes energization of the lamp starting circuit 36, wherein cathodes 52 and 54 are heated prior to the igniting of lamp 50. Additional circuit connections are well known in the art, and are not shown for purposes of clarity for the present description.
Ballast 10 may be considered a parallel load, series resonant circuit in that lamp 50 is placed in parallel with resonant capacitors 44 and 46 which are in series with resonant inductor 34. Positive temperature coefficient element 48 is provided parallel to resonant capacitor 44 to preheat the cathodes. Ballast 10 is useful for operation in single lamp that has low lamp arc current. It provides sufficient voltage for starting of lamp 50, and also works efficiently during the running of lamp 50 following the breakdown of gases in the discharge lamp.
A drawback to the described conventional parallel load, series resonant ballast and other similar ballasts is that high current stresses which exist on the resonant components and switching devices for high bus voltage implementations. High bus voltage, for example, in Europe is approximately 325 volts, and in the U.S. it is in the range of 390 volts for 277 RMS voltage input.
High currents are problematic since the resulting high lamp arc current not only goes through the switching devices but also goes through, for example, the resonant inductor 34. Therefore, resonant inductor 34 sees a summation of current which includes the lamp arc current and the resonant capacitor current through capacitors 44 and 46. The lamp arc current may vary, depending upon what type lamps are used. For example, for a 28-watt compact fluorescent lamp (CFL) T-4, the lamp arc current may be 210 milli-amps, while for a T-6 2D lamp, the lamp current may be 360 milli-amps or higher. This means the resonant inductor needs to be of a significant size to avoid becoming saturated and to ensure that the power dissipation is not excessive. It is also necessary to use switches such as Field Effect Transistors (FETs), Bipolar Junction Transistors (BJTs) or other known switching devices having high current ratings.
Another drawback of ballast 10 is that it""s resonant circuit has a poor power factor, where the input tank current and voltage are significantly out of phase, especially for the lamp with high lamp""s arc current. An issue is that the signal delivered by switching network 26 from node 37 has its current and voltage out of phase, wherein the current through inductor 34 is out-of-phase with the voltage from node 37 to 43. This out-of-phase state means more current to the tank than necessary to drive the lamp. For example, if only 30 watts were necessary in a fully in-phase system, in an out-of-phase system it may be necessary to deliver 50 or 60 watts of apparent power from the output of switches 28 and 30. The excess apparent power circulates between resonant circuit 36 and switch network 26 resulting in the dissipation of a large amount of power in the components.
In these high voltage implementations it is necessary to use components sized to handle the noted stresses and excess current. However, these larger than desired components are more expensive than smaller components, and take up more physical space. Since the electronics industry is increasingly striving to decrease the cost and size of the ballasts, the foregoing noted inefficiencies are impediments to the objectives of the industry. This is especially true for ballasts used to power lamps such as integral compact fluorescent lamps, high intensity discharge lamps and others.
Therefore, it is considered desirable to configure an inverter circuit topology which improves the power factor of the ballast""s tank circuit, to reduce the current stress on the resonant components and switching devices, allowing the use of smaller sized components. It is also desirable to provide a circuit which improves the output regulation over lamp impedance variations due to thermal effects, to provide a flexibility in preheating of the circuit, and for an overall improved and more economical ballast.
A high frequency, high power factor inverter circuit is provided to generate current for a load. A first inductor is connected to receive an input voltage. A second inductor is connected at one end to the load and at a second end to a first node. The second inductor is further magnetically coupled to the first inductor in a configuration which increases or boosts the voltage to the lamp. A first capacitive network is connected in parallel across the load. A second capacitive network is connected in series with the load, wherein the second capacitive network has a capacitive value larger than the first capacitive network. Prior to the load being activated, the first capacitive network and the load are operationally in parallel with each other, and the first capacitive network and first inductor are in series with each other. When the load is activated, the second capacitive network, the load, and the first inductor are operationally in series with each other. In a further embodiment, the first inductor and second inductor are not coupled together, rather the second inductor generates lagging current at a first node which acts to cancel leading current generated by the first capacitive network at the first node. The summation current at the first node may be less than the current otherwise seen by the system. Heating of the load, when it is a gas discharge lamp having cathodes is accomplished by the use of a cathode heater winding in operational connection with at least one of the cathodes and magnetically coupled to the first inductor.